1. Field of the Invention
The present invention relates to a semiconductor device and a method of producing the same, and in particular, to a stacked-chip semiconductor device having a structure in which a second semiconductor chip is disposed on a first semiconductor chip and on bonding wires connected to electrode pads of the first semiconductor chip, and a method of producing the same.
2. Description of the Related Art
With the continuing increase in the number of functions of electronic devices and increase in the speed of electronic devices, a decrease in the size, a decrease in the thickness, an increase in the functionality, an increase in the performance, an increase in the density, and a reduction in the cost have been desired for semiconductor devices used in the electronic devices. In order to meet such requirements, three-dimensional semiconductor devices produced by stacking a plurality of semiconductor chips have been practically used. Such a semiconductor device is referred to as a “stacked package”.
Semiconductor devices are produced by mounting a semiconductor chip on a semiconductor-chip-mounting component, such as a substrate or a lead frame, and then hermetically sealing the semiconductor chip.
A wire bonding method is widely used as a method of electrically connecting a semiconductor chip to a semiconductor-chip-mounting component. The wire bonding method is also often used for the stacked packages.
In a stacked package in which a substrate is used as a semiconductor-chip-mounting-and-supporting component, a first semiconductor chip to be disposed in a lower portion of the stacked package is fixed on the substrate using an insulating or a conductive adhesive, a second semiconductor chip to be disposed in an upper portion of the stacked package is disposed on the first semiconductor chip, and the second semiconductor chip is then bonded and fixed to the first semiconductor chip using an insulating adhesive. Subsequently, the first semiconductor chip is electrically connected to the substrate with first bonding wires, and the second semiconductor chip is electrically connected to the substrate with second bonding wires. The first and second semiconductor chips and the first and second wires are then sealed with a sealing resin.
An adhesive composed of an epoxy resin or the like is generally used as an insulating adhesive or a die-bonding material for bonding the second semiconductor chip onto the first semiconductor chip. The adhesive is used in the form of a liquid or a film.
Insulating adhesive films are widely used because they are advantageous in terms of workability and productivity. For example, an insulating adhesive film is applied in advance on a bottom surface of a semiconductor wafer, the surface not having electronic circuits thereon, and the insulating adhesive film is subjected to dicing together with the semiconductor wafer. As a result, a uniform amount of adhesive is applied on the bottom surface of each of the diced semiconductor chips.
In a stacked package in which a wire bonding connecting method is used as means for leading external connecting leads from a semiconductor chip, when a first semiconductor chip disposed in the lower portion of the stacked package is larger than a second semiconductor chip disposed in the upper portion of the stacked package and the electrode pads of the first semiconductor chip are located outside the second semiconductor chip, the electrode pads of the first semiconductor chip can be connected to electrode pads provided on a substrate by wire bonding.
However, in some combinations of semiconductor chips to be stacked, semiconductor chips having the same dimensions are arranged and stacked.
In such a stacking arrangement, electrode pads of a first semiconductor chip bonded on a substrate are connected to electrode pads provided on the substrate by a wire bonding method, a second semiconductor chip is bonded and fixed on the first semiconductor chip using an insulating adhesive, and then electrode pads of the second semiconductor chip are connected to electrode pads provided on the substrate by a wire bonding method.
According to such a fixing and connection structure, bonding wires connected to the electrode pads of the first semiconductor chip disposed in the lower portion of the stacked package can be in contact with, for example, the bottom surface of the second semiconductor chip disposed in the upper portion of the stacked package. Consequently, in order that the bonding wires connected to the electrode pads of the first semiconductor chip are not in contact with, for example, the bottom surface of the second semiconductor chip, it has been proposed that the bonding wires connected to the electrode pads of the first semiconductor chip be disposed in the insulating adhesive used for bonding the second semiconductor chip to the first semiconductor chip (see, for example, Patent Documents 1, 2, and 3).
In the technique disclosed in Patent Document 1, when a semiconductor chip to be disposed in the upper portion of a stacked package is bonded on a first semiconductor chip using an insulating adhesive, the thickness of the insulating adhesive is set so as to be higher than a loop top that is the top of bonding wires connected to electrode pads of the first semiconductor chip. In this case, a liquid insulating adhesive is applied to the entire surface of an area where the upper surface of the first semiconductor chip is to overlap with a second semiconductor chip. The second semiconductor chip is then placed on the insulating adhesive, and the insulating adhesive is cured by heating.
In this method, the distance between the first semiconductor chip and the second semiconductor chip is maintained by means of the insulating adhesive so as not to change the loop shape of each of the bonding wires. Therefore, the insulating adhesive requires a sufficiently large thickness, that is, an insulating adhesive with a sufficient thickness is necessary.
However, according to this method, it is difficult to control the thickness of the liquid insulating adhesive supplied to the first semiconductor chip. It is also difficult to control the degree of parallelization between the second semiconductor chip and the first semiconductor chip. If the second semiconductor chip is placed on the first semiconductor chip at an angle thereto and when electrode pads of the second semiconductor chip are connected to electrode pads provided on a substrate with bonding wires, a connection failure or the like may occur between the electrode pads of the second semiconductor chip and the bonding wires.
In the technique disclosed in Patent Document 2, an insulating resin layer made of a polyimide is provided between bonding wires connected to a first semiconductor chip and a second semiconductor chip disposed in the upper portion of a stacked package. More specifically, a die-bonding material film having a two-layer structure is applied on the bottom surface of the second semiconductor chip in advance. The die-bonding material includes a resin layer such as a polyimide insulating resin film which is used for providing a clearance and which is subjected to less plastic deformation in the range of 100° C. to 200° C., and another resin layer such as an epoxy resin layer which is used for providing adhesiveness and whose fluidity is increased by heating. When the second semiconductor chip is mounted on the first semiconductor chip, bonding wires connected to electrode pads of the first semiconductor chip are embedded in the resin layer with high fluidity and in contact with the other resin layer that is subjected to less plastic deformation, thereby preventing the bottom surface of the second semiconductor chip from being in contact with the bonding wires. In order that loops of the bonding wires are embedded in the resin layer with high fluidity, the second semiconductor chip is mounted by being stacked under heating.
This structure has the following problem. When the second semiconductor chip is mounted by being stacked on the first semiconductor chip, the loops of the bonding wires connected to the first semiconductor chip are pressed onto the die-bonding material having a two-layer structure. In the case where the fluidity of the resin layer with high fluidity is satisfactorily increased by heating, even when the loops of the bonding wires are pressed onto the resin layer, the change in the shapes of the loops of the bonding wires are negligible. However, when the loops of the bonding wires pass through the resin layer and reach the other layer that is used for providing a clearance and that is subjected to less plastic deformation, the shapes of the loops of the bonding wires are easily changed because of the hardness of the resin layer with less plastic deformation.
Furthermore, when the fluidity of the resin layer with high fluidity is not sufficient, the loops of the bonding wires are pressed onto the resin layer. Accordingly, when the loops are embedded in the resin layer under pressure, the shapes of the bonding wires are easily changed. The change in the shapes of the bonding wires causes short-circuits between adjacent bonding wires. In particular, in the case that the pitch of the electrode pads of the first semiconductor chip is small or electrode pads are provided at the central part of the semiconductor chip disposed in the lower portion of the stacked package, short-circuits between bonding wires easily occur. In addition, when a stress is applied to the bonding wires and the shapes of the bonding wires are changed, the stress becomes concentrated in portions where the bonding wires are connected to the lower semiconductor chip. Consequently, the bonding wires easily break at the connecting portions.
In the technique disclosed in Patent Document 3, a second semiconductor chip is bonded to a first semiconductor chip using a die-bonding material such that bonding wires connected to electrode pads of the first semiconductor chip are embedded in a part of the die-bonding material.
A method described in the above technique includes a step of decreasing the viscosity of the die-bonding material so that the bonding wires can be satisfactorily embedded in the die-bonding material when the second semiconductor chip is mounted by being stacked on the first semiconductor chip. In addition, the die-bonding material used for stacking and mounting the second semiconductor chip is an adhesive film composed of a plurality of adhesive layers having different viscosities when heated. The die-bonding material is disposed such that an adhesive layer that is in contact with the first semiconductor chip has a low viscosity. The die-bonding material is applied on the bottom surface of the second semiconductor chip in advance.
As in the means disclosed in Patent Document 2, this technique also has the following problem. When the second semiconductor chip is mounted by being stacked on the first semiconductor chip, the shapes of the bonding wires connected to electrode pads of the first semiconductor chip are changed. Accordingly, short-circuits between adjacent bonding wires easily occur, and the bonding wires easily break at portions where the bonding wires are connected to the first semiconductor chip.    Patent Document 1: Japanese Unexamined Patent Application Publication No. 8-88316    Patent Document 2: Japanese Unexamined Patent Application Publication No. 2002-222913    Patent Document 3: Japanese Unexamined Patent Application Publication No. 2004-72009